Email this article 
Method of testing the software of spacecraft electronic equipment based on fault injection in the algorithms of orientation and stabilization
- Authors: Nedorezov D.A.1, Postnikov A.I.1, Murigin A.V.2, Shnaider A.V.1
-
Affiliations:
- Siberian Federal University
- Siberian State University of Science and Technology named after Academician M.F. Reshetnev
- Issue: Vol 23, No 4 (2024)
- Pages: 79-88
- Section: AIRCRAFT AND SPACE ROCKET ENGINEERING
- URL: https://journals.ssau.ru/vestnik/article/view/28066
- DOI: https://doi.org/10.18287/2541-7533-2024-23-4-79-88
- ID: 28066
Cite item
Full Text
Abstract
The purpose of the work is to develop and describe a new method of testing spacecraft electronic equipment. The article substantiates the relevance of developing new methods and means of testing on-board electronic equipment of spacecraft based on the intentional introduction of faults for the purpose of testing survivability algorithms. It was shown that carrying out such tests makes it possible to increase the completeness of control and reliability of on-board electronic equipment of spacecraft while simultaneously reducing testing costs. A new method for testing spacecraft software based on fault injection is proposed, which is used to solve the specific task of checking orientation and stabilization modes. The proposed method makes it possible to develop semi-natural models of on-board electronic equipment of increased adequacy and reconfigurability due to the use of programmable logic integrated circuits as the basis of hardware and software complexes. The proposed method is implemented on the hardware and software of a ground-based debugging complex for on-board electronic equipment and is distinguished by the ability to simulate a wide range of on-board electronic equipment, low cost and mobility. All technical solutions described in the article were introduced into the production process when creating modern spacecraft for communications, radio navigation and geodesy.
About the authors
D. A. Nedorezov
Siberian Federal University
Author for correspondence.
Email: Nedorezovd@mail.ru
Candidate of Science (Engineering), Associate Professor, Associate Professor of the Department of Computing Technology, Institute of Space and Information Technologies
Russian FederationA. I. Postnikov
Siberian Federal University
Email: alpost@mail.ru
Candidate of Science (Engineering), Associate Professor, Associate Professor of the Department of Computing Technology, Institute of Space and Information Technologies
Russian FederationA. V. Murigin
Siberian State University of Science and Technology named after Academician M.F. Reshetnev
Email: avm514@mail.ru
Doctor of Science (Engineering), Professor, Head of the Department of Information Management Systems
Russian FederationA. V. Shnaider
Siberian Federal University
Email: shnayder102@gmail.com
Master Student of the Institute of Space and Information Technologies
Russian FederationReferences
- Sayt zhurnala Vestnik GLONASS [Website of the journal Vestnik GLONASS]. Available at: http://vestnik-glonass.ru/news/corp/roskosmos-nachata-rabota-po-proektu-sfera
- Sayt kompanii Starlink [Starlink company website]. Available at: https://www.starlink.com
- Sayt kompanii OneWeb [OneWeb company website]. Available at: https:// https://oneweb.net
- Sayt kompanii Globalstar [Globalstar company website]. Available at: https://www.globalstar.com/en-us
- Sayt kompanii TechSat [TechSat company website]. Available at: http://www.techsat.com/fileadmin/media/pdf/ADS2_ProductOverview/TechSAT-PD-ADS2-EN.pdf
- Parker K.P. A new probing technique for high-speed/high-density printed circuit boards. Proceedings of the International Test Conference (October, 26-28, 2004, Washington, DC, USA). doi: 10.1109/TEST.2004.1386972
- Norrgard D., Parker K.P. Augmenting boundary-scan tests for enhanced defect coverage. Proceedings of the IEEE International Test Conference (December, 08, 2008, Santa Clara, CA, USA). doi: 10.1109/TEST.2008.4700580
- Dubberke D.F., Grealish J.J., Van Dick B. Solving in-circuit defect coverage holes with a novel boundary scan application // Proceedings of the IEEE International Test Conference (December, 08, 2008, Santa Clara, CA, USA). doi: 10.1109/TEST.2008.4700579
- Nedorezov D.A., Pichkalev A.V., Krasnenko S.S., Nepomnuashy O.V. Application fpga for modelling of logic of functioning of spacecraft onboard radio-electronic equipment. Vestnik of SibGAU. 2014. No. 1 (53). P. 133-136. (In Russ.)
- Krasnenko S.S., Nedorezov D.A., Kashkin V.B., Pichkalev A.V. Bus-modular system for test of onboard radioelectronic equipment. Vestnik of SibGAU. 2013. No. 2 (48). P. 133-136. (In Russ.)
- Kulyasov N., Isaeva O., Isaev S. Method of creation and verification of the spacecraft onboard equipment operation model. IOP Conference Series: Materials Science and Engineering. 2019. V. 537, Iss. 2. doi: 10.1088/1757–899X/537/2/022042
- Li T., Guo Y., Li S.-K. Design and implementation of a parallel Verilog simulator: PVSim. Proceedings of the 17th International Conference on VLSI Design (January, 09, 2004, Mumbai, India). doi: 10.1109/ICVD.2004.1260944
- Austin T., Larson E., Ernst D. SimpleScalar: An infrastructure for computer system modeling. Computer. 2002. V. 35, Iss. 2. P. 59-67. doi: 10.1109/2.982917
- Li Z., Hu X., Zhang G. Design and realization of HA hot-swap application for CPCI/PXI system. Proceedings of the 2015 10th IEEE Conference on Industrial Electronics and Applications, ICIEA 2015 (June, 15-17, 2015, Auckland, New Zealand). P. 1613-1617. doi: 10.1109/ICIEA.2015.7334220
- Li D., Hu X. Hot-swap and redundancy technology for CPCI measurement and control systems. IEICE Electronics Express. 2016. V. 13, Iss. 20. doi: 10.1587/elex.13.20160794
- Penry D.A., Fay D., Hodgdon D., Wells R., Schelle G., August D., Connors D. Exploiting parallelism and structure to accelerate the simulation of chip multi-processors. Proceedings of the 12th International Symposium on High-Performance Computer Architecture (February, 1-15, 2006, Austin, TX, USA). P. 27-38. doi: 10.1109/HPCA.2006.1598110
- Schnarr E., Larus J.R. Fast out-of-order processor simulation using memorization. Proceedings of the Eight International Conference on Architectural Support for Programming Languages and Operating Systems (October, 3-7, 1998, San Jose, California, USA.). P. 283-294. doi: 10.1145/291069.291063
- Desikan R., Burger D., Keckler S.W. Measuring experimental error in microprocessor simulation. Proceedings of the 28th Annual International Symposium on Computer Architecture ISCA (June, 30-4, 2001, Gothenburg, Sweden). P. 266-277. doi: 10.1109/ISCA.2001.937455
- Nedorezov D.A., Legalov A.I., Nepomnjashhij O.V., Krasnenko S.S., Ankudinov A.V. Mutation test metodology for onboard spacecrafts radioelectronic equipment ground test. Systems and Means of Informatics. 2014. V. 24, no. 1. P. 73-79. (In Russ.). doi: 10.14357/08696527140104
- Nedorezov D.A. Sposob ispytaniy elektronnoy apparatury na osnove apparatno-programmnogo vneseniya neispravnostey s marshrutizatsiey [Method of testing electronic hardware based on hardware-software faults with routing]. Patent RF, no. 2725783, 2020. (Publ. 06.07.2020, bull. no. 19)
- Nedorezov D.A. Sposob ispytaniy vychislitel'nykh ustroystv sistem upravleniya kosmicheskikh apparatov [Method for testing computing devices of spacecraft control systems]. Patent RF, no. 2764837, 2022. (Publ. 21.01.2022, bull. no. 3)
Supplementary files
